An Apples to Oranges Comparision of a Gigabit Ethernet PHY to a General-Purpose CPU

Intel Core i7 Extreme Edition i980EE Broadcom BCM54980
Type 6 core CPU 8 port Gigabit PHY
Geometry 32nm 90nm
Operations Per Second 127 Billion instructions per second 4,800 Billion operations per second
Power 130W 4.0W
Operations Per Watt 976 Million Ops/W 1.2 Trillion Ops/W

Of course, this is an unfair comparison, but it shows you:
1) how much processing power goes into PHY (physical layer) products
2) how specializing a chip for a particular task can increase the number of computations per second
3) how ASICs can reduce power for certain applications over a general-purpose architecture by running an algorithm hard-wired rather than in software

John Sculley Interview

I read John Sculley’s interview with Leander Kahney. John Sculley was the CEO of Apple Computer from the mid 80s until the mid 90s. I appreciate Sculley’s candor and analysis, but I feel that while Sculley got the big picture of pervasive technology (The Newton), he didn’t and still doesn’t get the details. Sculley said a couple of things interview that I think were completely wrong. First, your digital watch is not, “at least 200 or 300 times more powerful than the first Macintosh” (!). Your cell phone, though, is definitely about that powerful. Maybe he was misquoted. The second thing is I think he was wrong saying he was wrong with regards to the PowerPC. Which, Sculley claimed, was a great mistake. It was, but not for the reasons he thinks.
Apple used Motorola SPS for its CPU chips in the Macintosh. SPS was constrained as a stepchild of the Motorola organization, which underinvested in the division. The 68040 was about a year late in being released, compared to its main competitor, the 80486. In those days, you were an integrated manufacturer, you designed the chip and manufactured (fabbed) it yourself, and Motorola’s own fabs had terrible yield. This was due to a combination of lack of investment in fabs and lack of discipline among the fab employees. When the 68040 went from 1 good DPW (die per wafer) to 2 good DPW, they threw a party. Think of a wafer of silicon as baking sheet. If you bake 108 cookies per sheet and you throw out 107 of them, you have a serious problem, except that you won’t eat them, which might be a good thing! Motorola couldn’t do a die shrink which would allow them to reduce the power and shrink the size of the cookie because their fabs couldn’t support it.
Now, Intel themselves thought CISC was going to be replaced (which is why they built the i860 and i960 in the late 80s. Sun had come out with the SPARC and MIPS had started up as well. Apple was not proactive about their options beyond the 68040. Motorola had released the 88000 series which was kind of late to the RISC party and had some architectural problems. They got back on track with the 88110. Apple had actually designed a system around the Motorola 88110 source but at the last minute switched to IBM’s POWER processor very quickly source source, because of a lack of confidence in Motorola’s execution. So Sculley made a choice to go with IBM. They switch to the PowerPC and then what does Sculley do? He brings Motorola in as a partner to the alliance to help design and manufacture the chips — with their lack of execution and dirty fabs. Unbelieveable! The 60x bus [the bus from the 88110] was added to the PowerPC and the rest is history. Of course, Motorola never changed the bus for its PowerPCs, up to and including the G4, while Intel and AMD moved their processors to faster, higher-bandwidth buses that allowed more instructions and data to pass.
So Sculley’s big mistake was not going with RISC, but not being decisive. At the time, RISC seemed a good choice for the desktop, and can’t be faulted. Even Microsoft was developing Windows for multiple platforms (including Alpha, MIPS, and PowerPC) around the time. The 88110 they tentatively selected did have some interesting features for desktop applications. Switching from 88110 to PowerPC delayed the release of faster Macintoshes for at least a year, and the 68040 did not get faster (like the 80486 did) during that time.

BMW Announces Ethernet Plans

This EE Times article lays out BMW’s plans for Ethernet in the car.

Anandtech was right

This report from EEtimes shows that Ganesh called it correctly a month and a half ago. The Apple A4 has the Samsung/Intrinsity Hummingbird core with other IP tacked on. An EETimes article from last year claims Marvell spent $100million on its Sheeva ARM processor and QUALCOMM spent $300 million on Snapdragon. If Apple is able to use Intrinsity’s domino logic tools to extend the Hummingbird core and develop future derivatives beyond the A4, the $50 to 125 million spent for Intrinsity could be a bargain. For other companies which want to be in the high-performance low-power processor business, what are they going to do, spend $250 million and wait 3 years, or buy Cavium for $1.5 bil?

Timeline of standalone gigabit copper PHYs

The following shows a timeline for gigabit PHYs from 1999 until today. Missing are Realtek and Attansic.

I updated the doc to show the trends on a per-port basis for cost and power. While the PHYs have different MAC interfaces, and some press releases quoted in 10K and others in 1K quantity, you can see the general trend toward lower cost and lower power due to Moore’s Law (and competition).